High Performance VLSI IC Systems
Background and insight into some of the most active performance-related research areas of the field is provided. Issues covered include CMOS delay and modeling, timing and signal delay analysis, low power CMOS design and analysis, optimal transistor sizing and buffer tapering, pipelining and register allocation, synchronization and clock distribution, retiming, interconnect delay, dynamic CMOS design techniques, asynchronous vs. synchronous tradeoffs, BiCMOS, low power design, and CMOS power dissipation. Historical, primary, and recent papers in the field of high-performance VLSI digital and analog design and analysis are reviewed and discussed. Each student is expected to participate in the class discussions and also lead the discussion surveying a particular topic.